The present invention relates to a multiprocessor system in which a plurality of independent modules including a processor and a memory are connected via a common transmission path, and in particular to a system and method for loading microprogram onto a transmission controller which handles interface with the transmission path between modules.
The system in which a plurality of independent modules including a processor and a memory are connected via a common transmission path is found in fields such as packet exchanges, for example. Each module has the transmission controller which manages the interface with the transmission path, the input-output controller which manages the interface with the external input-output devices, and the communication controller which manages the interface with the external communication lines. The processor controls the entire module and is connected to the transmission controller, the input-output controller, the communication controller, and the like via the internal transmission path in the module. Each of the transmission controller, the input-output controller, and the communication controller usually has its own memory for storing the microprogram, and operates under the control of its individual microprogram.
The present invention is directed to the microprogram contained in the transmission controller. In the prior art, this microprogram was stored in the read only memory (ROM), and the memory was initialized at the time of power-on to activate the transmission controller. Since the memory was a ROM, however, the ROM had to be replaced to correct the specification alteration or logic fault in the microprogram when it occurred. The component cost and personnel labor for replacement of the component is significant.
Known techniques relating to the present invention are disclosed in JP-A-No. 58-112118, JP-A-No. 58-54424 and JP-A-No. 58-3015, for example.